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updaet digital electronics

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uni/mmme/2051_electromechanical_devices/digital_electronics.md
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@ -93,7 +93,7 @@ Clock | J | K | $Q_\text{next}$ | $\bar Q_\text{next}$
0 $\rightarrow$ 1 | 1 | 0 | 1 | 0
0 $\rightarrow$ 1 | 1 | 1 | $\bar Q$ | $Q$
![](./images/vimscrot-2023-03-02T12:00:50,868501744+00:00.png)
![A shift register composed of 4 flip flops. $O_4$ is the most significant bit and $O_1$ the least.](./images/vimscrot-2023-03-02T12:00:50,868501744+00:00.png)
## Serial to Parallel Conversion with JK Flip-Flops